3: Branch Completion

• if (busA == busB)

  • PC <- Target

Ideal

Memory

WrAdr

Din

RAdr

32

32

32

Dout

MemWr=0

32

32

32

ALUOp=sub

Instruction Reg

32

IRWr=0

32

Reg File

Ra

Rw

busW

Rb

5

5

32

busA

32

busB

RegWr=0

Rs

Rt

Rt

Rd

PCWr=0

ALUSelA=1

RegDst

32

PC

MemtoReg

ExtOp

32

0

1

2

3

4

Imm

32

ALUSelB=01

Mux

1

0

32

Zero

Zero

PCWrCond=1

PCSrc=1

BrWr=0

32

IorD

Func

Op

Control

6

6

Beq

Rtype

Ori

Memory

:

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