Introduction to DRAM

• Dynamic RAM (DRAM):

  • Refresh required
  • Very high density
  • Low power (.1 - .5 W active,
    .25 - 10 mW standby)
  • Low cost per bit
  • Pin sensitive (few pins):
    • Output Enable (OE_L)
    • Write Enable (WE_L)
    • Row address strobe (ras)
    • Col address strobe (cas)

cell

array

N bits

¦N

¦N

r

o

w

SA & c o l

addr

log N

2

D

WE_L

OE_L

Previous slide

Next slide

Back to first slide

View graphic version