The ALU and Memory Elements

9/28/98


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Table of Contents

The ALU and Memory Elements

Today’s Lecture

Review: Boolean Functions

Review: Boolean Gates

Review: Circuit Example: 2x1 MUX

ALU Slice (Almost)

Truth Table for 1-bit Addition

A 1-bit Full Adder

Example: 4-bit adder

Subtraction

ALU Slice

Example: Adder/Subtracter

Overflow

Add/Subtract With Overflow detection

The new ALU Slice

The ALU

Abstraction: The ALU

Shifter

Memory Elements

Set-Reset Latch

Set-Reset Latch (Continued)

Set-Reset Latch (Continued)

Data Latch (D Latch)

D Flip-Flop

D Flip-Flop Timing

Tri-State Driver

Bus Connections

Register Cells on a bus

3-Port Register Cell

3-Port Register File

Address Decode Circuit

Register File (Four 4-bit Registers)

Summary

Author: Alvin R. Lebeck

Email: alvy@cs.duke.edu

Home Page: http://www.cs.duke.edu/~alvy