Datapath for Register-Register Operations
R[rd] <- R[rs] op R[rt] Example: add rd, rs, rt
Ra, Rb, and Rw comes from instruction’s rs, rt, and rd fields
ALUctr and RegWr: control logic after decoding the instructionfields: op and func
32
Result
ALUctr
Clk
busW
RegWr
32
32
busA
32
busB
5
5
5
Rw
Ra
Rb
32 32-bit
Registers
Rs
Rt
Rd
ALU
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