Shared Physical Address Space
LD/ST interface to remote memory
T3D
- 32 bit physical address space (not big enough!)
- DTB (TLB) Annex (5 bits of PA index Annex register to obtain 21-bit node ID + 27-bit local physical address)
- Prefetch Queue: off chip, 16 entries
- Bulk transfer engine (sequential and strided put or get, requires OS trap)
- prefetch and write-buffer usually better
- Single message queue
- enqueue or invoke thread (requires OS trap)