Table of Contents
Network of Workstations, Small Scale Shared Memory
Admin
Network of Worstations
Active Messages
Myricom’s Myrinet
DEC Memory Channel, Princeton SHRIMP
Performance of Distributed Memory Machines
Network Transaction Performance
Remote Read Performance
Review: Differences in Architectures
Coherence vs. Consistency
Why Coherence != Consistency
The Memory Model
Sufficient Conditions for Sequential Consistency
Snoopy Cache-Coherence Protocols
Snoopy Design Choices
The Simple Invalidate Snoopy Protocol
A 3-State Write-Back Invalidation Protocol
MSI Processor and Bus Actions
MSI State Diagram
An example
Next Time
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Author: Alvin R. Lebeck
Email: alvy@cs.duke.edu
Home Page: http://www.cs.duke.edu/~alvy
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