Storage Element: Register File
Register File consists of 32 registers:
- Two 32-bit output busses:
busA and busB
- One 32-bit input bus: busW
Register is selected by:
- RA selects the register to put on busA
- RB selects the register to put on busB
- RW selects the register to be writtenvia busW when Write Enable is 1
Clock input (CLK)
- The CLK input is a factor ONLY during write operation
- During read operation, behaves as a combinational logic block:
- RA or RB valid => busA or busB valid after “access time.”