Storage Element: Idealized Memory
Memory (idealized)
- One input bus: Data In
- One output bus: Data Out
Memory word is selected by:
- Write Enable = 0: Address selects the word to put on the Data Out bus
- Write Enable = 1: Address selects the memory word to be written via the Data In bus
Clock input (CLK)
- The CLK input is a factor ONLY during write operation
- During read operation, behaves as a combinational logic block:
- Address valid => Data Out valid after “access time.”