Classical DRAM Organization (square)

r

o

w

d

e

c

o

d

e

r

row

address

Sense-Amps, Column Selector &

I/O Circuits

Column

Address

data

RAM Cell

Array

word (row) select

bit (data) lines

• Row and Column Address together:

  • Select 1 bit a time

Each intersection represents

a 1-T DRAM Cell

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