Typical DRAM Organization

• Typical DRAMs: access multiple bits in parallel

  • Example: 2 Mb DRAM = 256K x 8 = 512 rows x 512 cols x 8 bits
  • Row and column addresses are applied to all 8 planes in parallel

One “Plane” of

256 Kb DRAM

512 rows

Plane 0

Dɘ>

Plane 1

Də>

Plane 7

Dɟ>

256 Kb

DRAM

256 Kb

DRAM

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